Module Hardcaml.Always

module type S = sig ... end
include S with module Signal := Signal
module Variable : sig ... end

The type of variables in guarded assignments. Variables may be asychronous wires, or synchronous regs. The current value of the variable may be accessed through the value field below.

type assign_internal
type if_internal
type match_internal
type switch_internal
type match_ = private {
  1. value : Hardcaml__.Signal__type.t * t list;
  2. internal : match_internal;
}
and t = private
  1. | Assign of {
    1. value : Variable.t * Hardcaml__.Signal__type.t;
    2. internal : assign_internal;
    }
  2. | If of {
    1. value : Hardcaml__.Signal__type.t * t list * t list;
    2. internal : if_internal;
    }
  3. | Switch of {
    1. value : Hardcaml__.Signal__type.t * match_ list;
    2. internal : switch_internal;
    }
val sexp_of_match_ : match_ -> Sexplib0.Sexp.t
val sexp_of_t : t -> Sexplib0.Sexp.t
type 'a case = 'a * t list
type 'a cases = 'a case list
val if_ : here:lexing_position -> Hardcaml__.Signal__type.t -> t list -> t list -> t

if statement

val elif : here:lexing_position -> Hardcaml__.Signal__type.t -> t list -> t list -> t list

else if branch

val else_ : t list -> t list

else branch (for readability)

val when_ : here:lexing_position -> Hardcaml__.Signal__type.t -> t list -> t

if sel then ... else

val unless : here:lexing_position -> Hardcaml__.Signal__type.t -> t list -> t

if sel then else ...

val switch : here:lexing_position -> Hardcaml__.Signal__type.t -> Hardcaml__.Signal__type.t cases -> t

switch statement

val proc : here:lexing_position -> t list -> t

Allows sequences of expressions to be inserted into the code; a syntactic nicety.

val (<--) : Variable.t -> Hardcaml__.Signal__type.t -> t

assignment

val (<--.) : Variable.t -> int -> t

assign an integer constant - width is inferred and value is truncated.

val (<-:.) : Variable.t -> int -> t

assign an unsigned integer constant

val (<-+.) : Variable.t -> int -> t

assign a signed integer constant

val incr : ?by:int -> Variable.t -> t

increment (defaults to 1)

val decr : ?by:int -> Variable.t -> t

decrement (defaults to 1)

module State_machine : sig ... end
val compile : t list -> unit

compile to structural code

module Clocked : sig ... end